As a packaging method of an acoustic wave device, there has been known a method that face-down mounts a chip on a circuit board, and then covers the periphery of the chip by a sealing member. The integration and downsizing of the acoustic wave device have been desired. Japanese Patent Application Publication No. 2008-546207 (Patent Document 1) describes that two piezoelectric substrates each including an Interdigital Transducer (IDT) formed on the surface thereof are bonded together so that the IDTs face each other across an air gap.
When the piezoelectric substrates are stacked so that the IDTs face each other as disclosed in Patent Document 1, a parasitic capacitance between the IDTs and/or wiring lines becomes large. Accordingly, the IDTs and/or the wiring lines interfere with each other, and the characteristics of the acoustic wave device deteriorate.